SEMINAR: AN ANALOG NEUROMORPHIC CLASSIFIER CHIP FOR ECG ARRHYTHMIA DETECTION
\nBy
\nMURAT ALP G\u00dcNGEN
\nM.S. in Electrical and Electronics Engineering
\nProf. Abdullah Atalar<\/p>\n
The seminar will be on Monday, September 30, 2019 at 13:00 @ EE-314<\/p>\n
ABSTRACT
\nFollowing Moore\u2019s Law, the increase in the availability of more processing power alongside the development of algorithms that can use this power, electrocardiogram (ECG) systems are now becoming a part of our daily lives. The analytical detection of irregularities within the ECG scan, arrhythmias, is tricky due to the variations in the signals that differ from people to people due to physiological reasons. In order to overcome this problem, a two stage machine-learning based time-domain algorithm is first developed and tested on MatLab using datasets from the MIT – BIH Arrhythmia Database. The algorithm begins with the preprocessing stage where seven features are extracted from the input ECG waveform. These features are then moved onto the second classification stage where a perceptron classifies the features as arrhythmic or normal. The algorithm was then converted into an analog CMOS circuit using the XFAB XC06M3 fabrication process on Cadence Virtuoso. Most of the operations in the preprocessing stage were completed using operational transconductance amplifiers (OTAs). For the classifier, the circuit uses analog floating gate metal oxide semiconductor transistors (FGMOS) to store the weights of the perceptron and a winner-take-all current comparator for the activation function. Simulation results show that the circuit works as intended with a power consumption of 290 \u00b5W.<\/p>\n
Keywords: Neuromorphics, ECG, arrhythmia, arrhythmia detection.<\/p>\n","protected":false},"excerpt":{"rendered":"
SEMINAR: AN ANALOG NEUROMORPHIC CLASSIFIER CHIP FOR ECG ARRHYTHMIA DETECTION By MURAT ALP G\u00dcNGEN M.S. in Electrical and Electronics Engineering Prof. Abdullah Atalar The seminar will be on Monday, September 30, 2019 at 13:00 @ EE-314 ABSTRACT Following Moore\u2019s Law, the increase in the availability of more processing power alongside [\u2026] <\/p>\n